Assertain-Dynamic Phase
Assertain is an innovative environment dedicated to measuring the completeness of the verification of digital SoC designs, in order to secure a faster and safer path to verification closure.
Covering all front-end design stages from original text specification through to validated RTL, Assertain monitors, measures and helps manage the verification process in one integrated environment. The tool seamlessly brings together rule, protocol and assertion checking; code and assertion coverage; design and assertion coverability analysis; test suite optimization; and specification coverage using proven requirements traceability techniques.
Assertain exists in three versions, each of them corresponding to a well defined type of application.

Dynamic verification phase - Key Features
  • A unified coverage results database for consistency across the entire project
  • The widest range of code coverage metrics – statement, branch, condition, path, toggle, trigger, signal trace, FSM state, arc and path
  • Unique step and variable metrics to measure detail coverage of assertions and functional points
  • Highest capacity test suite optimization based on code coverage results, linking RTL code to test benches to speed-up ECO iterations