English 繁中 简中 한국어 日本語 
  • 關於宏太
  • 新聞
  • 活動
  • 研討會
  • 矽智財
  • EDA工具
  • 聯絡我們

電子設計自動化軟體

系統層級
  • System Level Design Environment
  • ESL Hardware/Software Partition
  • ESL Synthesis
設計監控與驗證
  • Test Pattern Auto-Generator & DRC Runset Validator
信號完整性
  • SI Measurement In-Situ De-Embedding
  • Advanced SI Design Kits
  • Most accurate 2D field solver with surface roughness
  • Novel 3D SI solver for connector and cable design

電腦輔助設計工具

微機電系統設計
  • Visual Fab for MEMS Device
  • Multi-domain System Level Simulator
轉譯器
  • GDSII <-> DXF Translator
  • MEBES <-> GDSII Translator
  • Gerber -> BMP/TIFF Translator
Gerber應用程式
  • Net Extraction from Gerber/ODB++
瀏覽器
  • Ultra High Performance Layout Data Browser
  • GDSII/OASIS Viewer
繪圖軟體
  • GDSII Plotting
IC封裝測試
  • 3D Modeler & Viewer & DRC

EDA & CAD 工具

System Level
  • Hardware/Software Partition
  • ESL Synthesis

Design For Test
  • RTL-to-RTL Editing & Verification Platform
  • RTL Testability Analysis & Debug

IC Design
  • Analog & Mixed-signal Design

MEMS Design
  • Visual Fab for MEMS Device
  • Multi-domain System Level Simulator

Gerber Utility
  • Net Extraction from Gerber/ODB++

Plotting
  • GDSII Plotting
RTL Level
  • Code Coverage & Design Checking

Design Monitor & Validation
  • Test Pattern Auto-Generator & DRC Runset Validator
  • Cell Library & IP Validation

PCB Design
  • SI Model Generation & Validation
  • IBIS EBD Converter

Translators
  • GDSII <-> DXF Translator
  • MEBES <-> GDSII Translator
  • Gerber -> BMP/TIFF Translator

Viewer
  • GDSII/OASIS Viewer

IC Packaging Design
  • 3D Modeler & Viewer & DRC

© 2017 Avant Technology Inc. All rights reserved.

Home